############################################################################
/*
Project/Module : tb_tcbcver1
File Name : tb_tcbcver1.v
Version : 1-2
Date Created : 8/4/2008
Author : Teoh Zi Que
Code Type : Behavioural
Description : Testbench for tablet control and belt control machine
*/
//############################################################################
/*---------------------MODULE INSTANTIATION---------------------*/
module tb_tablet_control();
reg tb_r_sys_clk;
reg tb_r_sys_reset;
reg tb_r_s_start_count;
reg tb_r_s_resume_pause_n;
reg tb_r_prog_bottle_full;
reg tb_r_s_bottle_in;
wire tb_w_drop_tablet;
wire tb_move_belt;
//------------------------------------------
tablet_control
tablet_ctrl_belt_ctrl
(.ip_sys_clk_tcbc(tb_r_sys_clk),
.ip_sys_reset_tcbc(tb_r_sys_reset),
.ip_s_start_count_tcbc(tb_r_s_start_count),
.ip_s_resume_pause_n_tcbc(tb_r_s_resume_pause_n),
.ip_s_bottle_in_tcbc(tb_r_s_bottle_in),
.ip_prog_bottle_full_tcbc(tb_r_prog_bottle_full),
.op_tcbc_drop_tablet(tb_w_drop_tablet),
.op_tcbc_move_belt(tb_move_belt));
// Clock Generator
initial tb_r_sys_clk <= 0;
always #50 tb_r_sys_clk = ~tb_r_sys_clk;
//test case
initial begin
//test case1: power up the system
repeat(2)@(posedge tb_r_sys_clk) //hold the reset for 2 clock cycle
#20 tb_r_sys_reset = 1'b1; //delay for 20ps after rising edge of clock
tb_r_s_start_count = 1'b1;
tb_r_s_resume_pause_n = 1'b1;
tb_r_prog_bottle_full = 1'b0;
tb_r_s_bottle_in = 1'b0;
@(posedge tb_r_sys_clk)
tb_r_s_start_count = 1'b0;
tb_r_sys_reset = 1'b0;
//test case 2: move belt
@(posedge tb_r_sys_clk)
tb_r_prog_bottle_full = 1'b1;
tb_r_s_bottle_in = 1'b0;
//test case 3 stop move belt
@(posedge tb_r_sys_clk)
tb_r_s_bottle_in = 1'b1;
tb_r_prog_bottle_full = 1'b0;
@(posedge tb_r_sys_clk)
tb_r_sys_reset = 1'b1;
tb_r_prog_bottle_full = 1'b0;
tb_r_s_bottle_in = 1'b0;
@(posedge tb_r_sys_clk)
tb_r_sys_reset = 1'b0;
//test case 4: test drop of tablet
@(posedge tb_r_sys_clk)
tb_r_s_bottle_in = 1'b1;
//test case 5: pause when tablet dropping
@(posedge tb_r_sys_clk)
tb_r_s_resume_pause_n = 1'b0;
//test case 6:resume the tablet drop process
@(posedge tb_r_sys_clk)
tb_r_s_resume_pause_n = 1'b1;
$stop;
end
endmodule
p/s:就是这个东西让我暴躁！
